This application is a continuation-in-part of U.S. application Ser. No. 08/597,445 entitled xe2x80x9cRF Plasma Reactor with Hybrid Conductor and Multi-Radius Dome Ceilingxe2x80x9d, filed Feb. 2, 1996 by Gerald Yin et al., which is a continuation-in-part of U.S. application Ser. No. 08/389,889 entitled xe2x80x9cRF Plasma Reactor with Hybrid Conductor and Multi-Radius Dome Ceilingxe2x80x9d filed Feb. 15, 1995 by Gerald Yin et al.
1. Technical Field
The invention is related to radio frequency (R.F) inductively or capacitively coupled plasma reactors used in processing semiconductor wafers, and in particular to improvements therein for increasing the plasma ion density uniformity across the wafer surface.
2. Background Art
Inductively coupled plasma reactors are currently used to perform various processes on semiconductor wafers including metal etching, dielectric etching and chemical vapor deposition, as some examples. In an etch process, one advantage of an inductively coupled plasma is that a high density plasma is provided to permit a large etch rate independently of wafer bias, thereby permitting more control of the wafer bias to reduce device damage. For this purpose, the source power applied to the antenna and the bias power applied to the wafer pedestal are controlled separately. Separating control of the bias power and source power facilitates independent control of ion density and ion energy, in accordance with well-known techniques. To produce an inductively coupled plasma, the antenna is a coil inductor adjacent the chamber, the coil inductor being connected to the RF source power supply. The coil inductor provides the RF power which ignites and sustains the plasma. The geometry of the coil inductor can in large part determine spatial distribution of the plasma ion density within the reactor chamber.
One problem with such a plasma reactor is that the spatial distribution of the plasma ion density across the wafer surface is often non-uniform. This is a problem in a metal etch process, for example, because the etch rate and accumulation of electric charge on the device is affected by plasma ion density. Specifically, non-uniform plasma ion density distribution tends to render the etch rate non-uniform across the wafer and leads to device damage from charge build-up. As a result, the etch process is difficult to control, over-etching devices on some portions of the wafer and under-etching devices on other portions of the wafer, leading to reduced production yield.
One of the causes of non-uniform plasma ion distribution is the coil geometry and location. Another cause is the shape of the plasma itself, which is largely determined by the shape of the reactor chamber, particularly the reactor chamber ceiling.
Generally, the coil inductor of an inductively coupled plasma reactor is wrapped around the reactor chamber, although it does not necessarily conform to the shape of the reactor chamber walls. Necessarily, different regions of the wafer surface are displaced from the nearest coil windings by different distances and therefore experience different plasma ion densities.
Depending upon the shape of the reactor chamber ceiling, more plasma volume is located over the wafer center and less over the wafer edges, particularly in the case of a conical or hemispherical ceiling, for example. Accordingly, there tends to be inherent spatial non-uniformities in the ion flux density.
A different approach is disclosed in U.S. Pat. No. 4,948,458 to James Ogle in which a plasma reactor has a flat ceiling and a flat coil antenna overlying the ceiling. However, this approach has generally been found to provide no improvement in plasma ion density uniformity and moreover suffers from relatively large capacitive coupling in the plasma, hindering control of the plasma ion energy. A modification of that approach is disclosed in U.S. Pat. No. 5,368,710 to Chen et al., in which an attempt is made to adjust the plasma characteristics such as density by increasing the thickness of the dielectric chamber cover toward the center of the chamber. U.S. Pat. No. 5,346,578 discloses a reactor having an arcuate ceiling. However, such techniques are generally limited in their best applications to a relatively narrow window of process recipes.
Thus, there is a need for a plasma reactor which permits versatile optimization of plasma characteristics to optimize uniformity of plasma ion density distribution over a large process window.
An RF plasma reactor for processing a semiconductor wafer in a reactor chamber with a multi-radius dome-shaped ceiling and a gas inlet for supplying a process gas into the chamber includes an overhead RF signal applicator near the ceiling for applying an RF signal into the chamber through the ceiling to maintain a plasma of the process gas in the chamber, the plasma having a radial ion density distribution near the plane of the pedestal which is center-high for a greater height of the ceiling above the pedestal and is center-low for a lesser height, the height of the ceiling being intermediate the greater and lesser heights such that the radial ion density distribution is neither center-high nor center-low. In another aspect of the invention, the RF signal applicator has an annular distribution characterized by an effective mean radius, the plasma having a radial ion density distribution with respect to an axis of symmetry of the ceiling which is center-high for a lesser mean radius of the signal applicator and center-low for a greater mean radius of the signal applicator, the mean radius of the signal applicator being intermediate the greater and lesser mean radii such that the radial ion density distribution is neither center-high nor center-low.
The process gas may be selected to be compatible with any one of: (a) a metal etch plasma process, (b) a silicon oxide etch plasma process, (c) a polysilicon etch plasma process, (d) a silicide etch process, (e) a nitride etch process, (f) a polymer etch process. The following additional features obtain either singly or in combination in preferred embodiments of the invention.
The ceiling height may be such that the ion density distribution may be neither predominantly center-high nor predominantly center-low. The distribution may be M-shaped. The ceiling height may be in the range of 3 to 11 inches for a chamber diameter exceeding 200 mm. The ceiling height may be in the range of 4 to 12 inches for a chamber diameter exceeding 300 mm. The ceiling may include a flat interior surface facing the wafer pedestal. The ceiling may include a smooth three-dimensionally shaped interior surface facing the wafer pedestal. The highest part of the interior surface may be disposed at the intermediate height. The ceiling may include a flat interior surface facing the wafer pedestal. The ceiling may include a smooth three-dimensionally shaped interior surface facing the wafer pedestal. The ceiling height may be approximately 7 inches. The ceiling may define a multi-radius interior surface of the chamber. The interior surface may have a major radius and a minor radius defining a ratio therebetween in the range of about 2 to 10. The interior surface may have an apex, the apex lying at the intermediate height. The chamber may have a diameter of between about 12 inches and 24 inches for a wafer diameter in the range of approximately 6-12 inches.
If the process gas is compatible with a metal etch process then it may include at least one of the following etchants: chlorine, BCl2, HCl, HBr, and the ceiling may be at a height above the support in a range of about 3xe2x80x3 to 11xe2x80x3 the mean radius may be in a range of about 3xe2x80x3 to 9xe2x80x3, where the chamber may be sufficiently large to accommodate a 200 mm wafer. Alternatively, for the metal etch process, the ceiling may be at a height above the support in a range of about 4xe2x80x3 to 12xe2x80x3, the mean radius may be in a range of about 5xe2x80x3 to 14xe2x80x3, where the chamber may be sufficiently large to accommodate a 300 mm wafer. For metal etch the RF signal may have a frequency of about 2 MHz.
If the process gas is compatible with a silicon oxide etch process then it may include at least one of the following etchant precursors: a fluorocarbon, a fluorohydrocarbon, and the ceiling may be at a height above the support in a range of about 3xe2x80x3 to 11xe2x80x3, the mean radius may be in a range of about 5xe2x80x3 to 11xe2x80x3 where, the chamber is sufficiently large to accommodate a 200 mm wafer. Alternatively for the silicon oxide etch process, the ceiling may be at a height above the support in a range of about 4xe2x80x3 to 12xe2x80x3, the mean radius may be in a range of about 6xe2x80x3 to 14xe2x80x3 where the chamber may be sufficiently large to accommodate a 300 mm wafer. For the silicon dioxide etch process, the RF signal may have a frequency of about 2 MHz.
If the process gas is compatible with a polysilicon etch process then it may include at least one of the following etchants: chlorine, HBr, mixed with at least one of the following: oxygen, a non-reactive gas, an inert gas, and the ceiling may be at a height above the support in a range of about 3xe2x80x3 to 11xe2x80x3, the mean radius may be in a range of about 41xe2x80x3 to 12xe2x80x3, where the chamber may be sufficiently large to accommodate a 200 mm wafer. Alternatively, for the polysilicon etch process, the ceiling may be at a height above the support in a range of about 4xe2x80x3 to 12xe2x80x3, the mean radius may be in a range of about 6xe2x80x3 to 15xe2x80x3, where the chamber is sufficiently large to accommodate a 300 mm wafer. For the polysilicon etch process the RF signal may have frequency of at least 10 MHz. For the polysilicon etch process, the invention may include maintaining a pressure in the chamber less than 20 mT or between about 1 mT and 5 mT. The height of the ceiling above the wafer pedestal and the means radius of the RF signal applicator define a ratio therebetween in the range of approximately 0.8 to 1.5.
The invention provides advantages in power deposition, azimuthal electric field, ion density and ion flux directionality and electron temperature. Specifically, the electric field at the wafer is reduced relative to a fixed set of process conditions, reducing device damage. The region where ions are produced (i.e., the region nearest the coil) is remote from the wafer so that non-uniformities therein are amelioriated by ion diffusion before reaching the wafer surface. The ion flux is more collimated so that a generally lower bias voltage on the wafer suffices to achieve anisotropic etching. The electron temperature gradient across the wafer surface, thereby reducing device damage due.